1. Field of the Invention
The present invention relates to an integrated media processor chip, which performs video, audio, system, and network connectivity functions.
2. Description of the Background Art
Existing media processing devices take many different shapes, sizes, and costs. These computing devices range from single-fixed function chips to programmable processor chips. These devices are used in set-top boxes, DVD players, digital cameras/camcorders, as well as the emerging digital TV market, and their prices have been mostly constant over time. Majority of these chips have a programmable processor plus many dedicated fixed-function blocks. The processor does not have enough processing power to be in the video data path, and it is used as a supervisory control of data between fixed-function blocks. Some of these chips may feature multiple on-chip processors for handling, audio, system, and stream decode functions.
Designers of future digital TVs and set-top boxes have to incorporate the following functionality:                A. MPEG-2 decode, which requires video decompression, audio decompression, and audio/video stream de-multiplexing and related stream layers functions.        B. Video enhancement because, for current and upcoming large screen projection, LCD and Plasma displays, it is important to process images to reduce artifacts due to interlacing, compression, etc.        C. Support other new standards of MPEG-4 and H.264, as well as proprietary standards from Real Networks and Microsoft for DVD and video compression.        D. On-screen displays (OSD) and user control via remote control. OSDs are used for user menus and also for web browser and teletext functionality commonly used in Europe.        E. Personal Video Recorder (PVR) functionality to store and pause live audio/video.        F. Network connectivity and home gateway functionality in interfacing to LAN and broadband network interface chips.        
Currently, each of the above functionality requires a separate chip plus memory chips to implement. This increases the cost and number of chips significantly. Current TV manufacturers would like to have one flexible platform that would meet the requirements for different products and geographic markets.
Some of building blocks such as MPEG-2 decoder chip do not support the latest compression standards and algorithms. This represents a problem because audio/video standards are evolving at a fast pace. MPEG-2 came out in 1995, and MPEG-4 part 2 came out in 1999, and now MPEG-4 part 10 was out in 2002. MPEG-4 part 10 offers 2-3 times improvement over MPEG-2, but requires variable block sizes and significantly more processing power. H.264 as part of MPEG-4 part 10 will allow storing a video at 1 or 1.5 Mbps using a CD-RW drive. The fixed function processors such as the one from ATI (Xillieon 220 chip from ATI, inc. is system-on-a-chip for digital TV, set-top boxes, and media gateways) and other manufacturers do not have to flexibility to meet requirements of a video decompression, compression, enhancement, and system layer tasks as required by market of multiple standards plus proprietary ones. In other words, a fully programmable video processor is required to support both the new and legacy standards.
There are some VLIW chips such as the one from Texas Instruments (TMS3206415 DSP) and Equator (MAP-CA VLIW Processor) that provide a fully programmable platform for audio/video processing. Another is the media processor proposed by Ezer, et al [See referenced patent]. These processors implement all tasks in a single SIMD or VLIW processor. These have significant problems. First, these processors do not provide the processing power to handle all video and audio functions. As a result, significant compromises have been made in software implementation, which lowers the resultant quality of video and audio. Second, combining these characteristically different tasks on a single processor core reduces the efficiency significantly. For example, while performing the streaming operation, which is intrinsically not parallelizable, most of the elements of VLIW or SIMD stay idle and not used.
The task switching between these multiple audio, video, and system tasks require several hundred-clock cycles, which further reduce the efficiency. Furthermore, the developers' task of integrating audio, video, stream, and system functions into a single core unit's multiple tasking becomes formidable. Some of the existing processors such as Texas Instruments' MVP DSP used multiple cores with shared memory on a single chip. However, the shared memory contentions and the difficulty of programming made such an approach failure, and as a result this processor has been discontinued.
These devices also lack the direct interfaces to connect to external devices as required. They do not have FIFOs and they do not have ports for direct connection to IDE, video input/output, IEEE-1394, transport stream input, etc.
These devices also lack the high-quality video output scaler for converting internal resolution to match to resolution of the display device. High quality video scaling, by itself, exceeds the processing capabilities of some of these processors.
Manufacturers of next generation TVs are unable to differentiate their picture quality from one another because today, all merchant video processing ICs for video enhancement are fixed function. Therefore, tier 1 manufacturers like Sony build their own video enhancement chips that are fixed function. Tier 2 manufacturers have to use off-the-shelf video enhancement chip with no differentiation for their products.
In summary, existing processors and other dedicated chips lack the three key ingredients sought by TV and set-top box manufacturers in descending priority: Low cost, high video quality, and flexibility.
Digital Camcorder
Convergence of Digital Cameras and Digital Camcorder functionality has begun. Digital cameras can capture of 10-15 seconds long video sequences using MPEG, in addition to JPEG recording of still pictures. Digital camcorders use DV format to store compressed video and audio at 25 M-bits per second, but also support still frame capture. A powerful and low-cost media processor would enable further convergence using the latest audio/video compression algorithms that reduce audio/video to about 1 Mbits per second, whereby enabling its storage in small semiconductor storage devices such as memory cards, or its transmission over internet networks using wireless or LAN. The new cameras would then no longer need complicated mechanical drive and record mechanisms. The compressed audio and video data stream would simply be stored on a DAT drive or a Flash Memory card. Such storage will lower the cost and physical size while fully combining the functionality of digital cameras and digital camcorders. The following lists the advantages that would be provided by such a processor:                Combined digital camera and camcorder functionality in a small package;        Flash card could be used to store video and audio using H.264 compression (MPEG-4 Part).        Major cost reduction since tape drive mechanism and expensive record head no longer required, combined with reliability of solid state mechanism.        Supports MPEG-4 encode and decode (and mp4 file format);        Supports the new JPEG-2000 standard to capture still frame shots, which produces 2× better picture quality in comparison to the legacy JPEG;        Also supports other media compression standards that could be directly transferred to PC and played back: Windows Media Player 8.0, RealNetworks        Sophisticated motion stabilization in video camera mode—media processor would also be capable of video rate stabilization to sub pixel resolution and can compensate for image motions as large as 64 pixels;        Longer battery life and smaller battery required due to no complicated tape drive mechanism needed, and power management functions of processor.        Supports image mosaicking of multiple panned frames into a single panoramic picture.        